Sunghye Park is a postdoc in the CAD & SoC Design Lab. at Postech. She earned the B.S. degree in electronics engineering from the Kyungpook National University (KNU), South Korea, in 2019, and M.S. and Ph.D degrees in electrical engineering from the Pohang University of Science and Technology (POSTECH), South Korea, in 2019, and 2024, respectively (advisor: Prof. Seokhyeong Kang).
Her research interests include design automation for quantum computing, especially in quantum circuit mapping (i.e., quantum compiler) and fault-tolerant quantum computing. She published papers in conferences such as DAC and ICCAD.
🔗 GitHub
[1] Sunghye Park, Dohun Kim, and Seokhyeong Kang, “HiLight: A Comprehensive Framework for High-Performance and Lightweight Scalability in Surface Code Communication,” in 2024 61th ACM/IEEE Design Automation Conference (DAC), Jun, 2024.
[2] Ludwig Schmid, Sunghye Park, Seokhyeong Kang and Rober Wille, “Hybrid Circuit Mapping: Leveraging the Full Spectrum of Computational Capabilities of Neutral Atom Quantum Computers,” in 2024 61th ACM/IEEE Design Automation Conference (DAC), Jun, 2024.
[3] Seongbin Kwon*, Dohun Kim*, Sunghye Park, Seojeong Kim and Seokhyeong Kang, “QNSA: Quantum Neural Simulated Annealing for Combinatorial Optimization,” in IEEE/ACM International Symposium on Quality Electronic Design (ISQED), 2024 [accepted].
[4] Kyungjun Min, Seongbin Kwon, Sung-Yun Lee, Dohum Kim, Sunghye Park and Seokhyeong Kang, “ClusterNet: Routing Congestion Prediction and Optimization using Netlist Clustering and Graph Neural Networks,” in 2023 43th IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Oct, 2023.
[5] Sunghye Park, Dohun Kim, Jae-Yoon Sim, and Seokhyeong Kang, “MCQA: Multi-Constraint Qubit Allocation for Near-FTQC Device,” in 2023 42th IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Oct, 2022.
🔗 Paper
[6] Sunghye Park, Daeyeon Kim, Minhyuk Kwoen, Jae-Yoon Sim, and Seokhyeong Kang, “A Fast and Scalable Qubit-Mapping Method for Noisy Intermediate-Scale Quantum Computers,” in 2022 59th ACM/IEEE Design Automation Conference (DAC), Jul, 2022.
🔗 Paper
[7] Sunghye Park, Sunmean Kim, Sung-Yun Lee, Seokhyeong Kang, “Multi-Threshold Graphene Barristor-Based Ternary ALU,” in Proc. IEEE International SoC Design Conference, 2019.
[8] Sunmean Kim, Sung-Yun Lee, Sunghye Park, and Seokhyeong Kang, “Design of Quad-Edge-Triggered Sequential Logic Circuits for Ternary Logic,” in Proc. IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL), 2019, pp. 37-42.